1. Field of the Invention
The present invention generally relates to image-forming apparatuses and, more particularly to an image forming apparatus having a high-speed print engine.
2. Description of the Related Art
In an image processing apparatus, a memory for storing drawing data may be connected to a print engine via an application specification integrated circuit (ASIC) connected to an interface (hereinafter abbreviated as I/F) referred to as an accelerated graphic interface (hereinafter abbreviated as AGP). Since the memory for storing the drawing data supplied by a central processing unit (CPU) includes a local memory (hereinafter abbreviated as MEM-C) and a memory for drawing (hereinafter abbreviated as MEM-P), there are a plurality of paths as an image path. Moreover, since an ASIC used in an image forming apparatus generally has a compression function and a data transfer function, there are plural paths for sending code data to its designation.
FIG. 1 is a block diagram of a conventional image processing apparatus. In FIG. 1, a CPU 1603 is connected to an ASIC 1602, and a program is stored in a read only memory (ROM) 1604. Upon reception of a read request for an execution code from the CPU 1603, the ASIC 1602 outputs an address to the ROM 1604 so as to read data from the ROM 1604. The read data are transferred to the CPU 1603 and processed by the CPU 1603.
A controller 1601 is connected to the engine 1610 through the PCI 1609. The CPU 1603 interprets a drawing command written by a page-description language, which is received from a host I/F 1606, and carry out drawing on a page buffer 1611 reserved in a MEM-C 1605. After the drawing on the page buffer 1611 is completed, a command is sent to the engine 1610. Then, the engine 1610 reads image data from the page buffer 1611 of the MEM-C 1605.
Additionally, the data of the page buffer 1611 is stored in a hard disk (HDD) 1608 for jam backup. Moreover, if needed, a message is displayed on an operation part 1607, and a response of a user is received through the operation part 1607.
In the above-mentioned structure, the engine 1610 may become a bus master of the PCI 1609 so as to read image data. At this time, if the image data is in the memory for drawing, it takes a relatively long time to transfer the image data to the engine 1610 due to a response of an AGP bus. Therefore, if the engine 1610 is a high-speed processing engine, there is a problem in that the image data cannot be stored in the memory for drawing.